Analog-to-digital converter (ADC) circuits are common components of many integrated circuit designs. An ADC circuit encodes an analog input voltage to a discrete N-bit digital word. Each unique value (or code) of the N-bit digital word corresponds to a small range of analog input voltages referred to as the code width, with the range having a code center. The difference between the analog input voltage and the corresponding voltage of the nearest code center is referred to in the art as the quantization error. Since the ADC circuit has a finite number of output bits N, even an ideal ADC circuit produces some quantization error with every sample of the analog input voltage.
The operation of an ADC circuit differs from an ideal behavior in many ways, with the difference specified in terms of a number of performance figures of merit. Of some importance are the following figures of merit: a) integral nonlinearity (INL) which refers to the distance of the code centers from ideal; b) differential nonlinearity (DNL) which refers to the deviation of the code width from ideal; c) offset error which refers to deviation in ADC circuit behavior at zero from ideal; and d) gain error which refers to deviation in the slope of a line passing through the ADC end points at zero and full scale from ideal. Other performance figures of merit are also known in the art.
Because an ADC circuit provides a critical link between the analog circuit domain and the digital circuit domain in many integrated circuit devices, it is important that the ADC circuit operate within certain specification requirements for the performance figures of merit. Accordingly, it is well known in the art to test the ADC circuit and reject or tune the integrated circuit device which includes the ADC circuit in the event testing reveals ADC circuit operation outside of the specification requirements. One conventional technique for ADC circuit testing involves the application of an externally supplied analog test signal (such as a ramp or sinusoid) to the input of the ADC circuit, followed by the evaluation of the series of N-bit digital words that are output from the ADC circuit in response to the test stimulus signal.
There is, however, a need for a built-in self-test (BIST) circuit to generate the test stimulus signal for application to the input of the ADC circuit and evaluate the digital output.